SK hynix showcases its next-generation memory portfolio for the AI era at TSMC's OIP conference

SK hynix took part in TSMC's Open Innovation Platform (OIP) conference, held on September 23 in Santa Clara, California, where it presented its next-generation memory portfolio — HBM, server DRAM and SSDs — and received TSMC's Partner of the Year award for the second year running. OIP is the open innovation platform TSMC operates to develop technology alongside the companies that make up the semiconductor ecosystem; each year, in the second half, TSMC invites its members and major customers to ecosystem forums held in different parts of the world. SK hynix has taken part in these forums since 2024, showcasing the evolution of its AI-oriented memory capabilities, the fruit of its strategic alliance with TSMC.

The slogan SK hynix chose for its booth was 'The Memory behind the Intelligence at Scale', a message intended to stress that the growth and expansion of AI depends on the backing of memory technology. The company explained that, in today's AI semiconductor ecosystem, collaboration between companies is closer than ever: the industry has moved from a stage in which design and manufacturing, or memory and logic, were optimized separately, to a model in which companies jointly design and validate from the earliest phases of development.

The exhibit was organized into two main areas: one devoted to HBM (High Bandwidth Memory) and another to AI-optimized memory and storage. The HBM area displayed NVIDIA's 'Vera Rubin' superchip equipped with SK hynix's 12-layer, 36GB HBM4, together with 96GB SOCAMM2 modules, a type of memory module specialized for AI servers and based on low-power DRAM. According to the explanation offered at the booth, the 12-layer HBM4 is integrated directly around the Rubin GPU core, acting as a high-bandwidth data path that resolves the transfer latency arising in complex matrix operations, while SOCAMM2 works as the system's main memory for the Vera CPU, supporting the computational processes that allow AI agents to immediately reflect the context of long conversations in their responses.

Alongside the superchip, other key products from the HBM range were also shown: the 12-layer, 48GB HBM4E, the 16-layer, 48GB HBM4, and the 12-layer, 36GB HBM3E, together with an actual 192GB SOCAMM2 unit. The company noted that HBM has advanced through successive generations — HBM, HBM2, HBM2E, HBM3, HBM3E and HBM4 — and that this comparison between products already integrated into AI accelerators and the next generation let visitors appreciate that evolution firsthand.

In the area devoted to server DRAM, SK hynix showed the 256GB '3DS RDIMM' module, which the company describes as the industry's largest capacity tailored to AI workloads, along with the 128GB 'MRDIMM', offering high bandwidth by operating two ranks simultaneously, and the 64GB 'RDIMM', which the company says is the world's first to apply a sixth-generation 10-nanometer-class (1c) process. The SSD area featured a range covering different form factors and usage environments: the 'PEB210 E1.S', compatible with direct liquid cooling (DLC), which drew strong interest from data-center operators; the 'PS1101 E3.S', SK hynix's first eSSD based on QLC NAND, which generated a steady stream of enquiries from enterprise customers; and the 'PEB210 M.2'.

The Partner of the Year award was collected on behalf of SK hynix by team leader Jinwoo Park (PKG Product TE) and vice president Jaesik Lee (head of Advanced Packaging Research), in the '3DFabric-HBM Integration' category. The recognition was granted for the collaboration that made it possible to validate HBM5 on the basis of TSMC's CoWoS advanced packaging technology (Chip on Wafer on Substrate, used to integrate chips such as HBM and GPUs on a single substrate) with future AI systems in mind. SK hynix explained that, as HBM advances in layer count and bandwidth, fully exploiting those gains requires close coordination with the packaging technology that integrates it into an actual accelerator, and that its packaging development organization worked alongside TSMC from the earliest validation stages.

In the presentation sessions, Daesik Park, a distinguished engineer in PCIe design at SK hynix, spoke as the second presenter in a joint session with Cadence titled 'PCI Express Solutions for HPC/AI Storage'. Park explained that, since the fourth generation of PCIe, each new generation has arrived every two or three years doubling bandwidth, and that from the sixth generation onward power optimization and collaboration between design and manufacturing process take on particular importance. He also noted that, as new memory layers emerge — including HBM and HBF (High Bandwidth Flash, a next-generation NAND memory positioned as an intermediate layer between HBM and SSD which, by applying a logic process to the base die, would offer far greater capacity than HBM at comparable bandwidth and cost) — PCIe is consolidating its position as the key interface connecting those layers to GPUs, CPUs and networks.

On market projections, Park indicated that the PCIe-based eSSD market is expected to grow around 3.8-fold, from 509 exabytes (EB) in 2026 to 1,933 EB in 2030, driven by the expansion of AI infrastructure, and that demand for high capacity, high density and cooling efficiency will rapidly increase demand for the E1.S and E3 form factors. He added that SK hynix has developed SSD controllers using TSMC processes since the third generation of PCIe, and that for the sixth and seventh generations the company is preparing next-generation chiplet-based SSD solutions: a design that splits the conventional single-chip controller into chiplet units connected via UCIe (Universal Chiplet Interconnect Express), which is expected to enable shorter development times, independent generational transitions by function, capacity expansion and power optimization.

In its closing statement, SK hynix said that, by winning the Partner of the Year award for the second consecutive year at this OIP conference, it has once again confirmed the results of the collaboration built with TSMC, and that it will continue working closely with a range of partners to create the memory solutions the AI era demands.