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Agentic AI comes to chip design: Agnisys brings end-to-end automation for semiconductors to DAC 2026

🕒 Published on Zendoric: July 23, 2026 · 00:24

Agnisys will present its IDS-AI suite at the Design Automation Conference (DAC) 2026, an agentic AI framework that runs from specification to RTL sign-off, plus on-chip network and test automation. It's a textbook case of how agentic AI is slipping into the industry that manufactures the hardware sustaining AI itself.

By Zendoric · July 23, 2026.

Agnisys, a provider of automation tools for semiconductor design, will show three developments at the Design Automation Conference (DAC) 2026 —the sector's benchmark trade show, held July 27–29 in Long Beach, California—: IDS-AI, an agentic artificial intelligence framework that it says covers the entire chip design flow, from the initial specification to what is called RTL sign-off (the final validation of the design described in Register-Transfer Level, the language used to define hardware behavior before manufacturing it); IDS-NoC, to automate the creation of the chip's internal networks (Network-on-Chip, the infrastructure that connects the various cores and blocks within a single processor); and a new Design-for-Test (DFT) technique, designed to detect manufacturing defects before the chip goes into production.

According to Agnisys's own data, the first customers of its new testing technique —dubbed Design-Aware Test Points— have seen up to 4 times more test coverage per flip-flop (the basic unit of digital memory in a chip) and 50% fewer automatic test pattern (ATPG) sets across the whole chip. These are figures the company has not had verified by an independent third party, so they should be taken as a marketing claim, not a closed benchmark. The most verifiable part of the announcement is the joint technical presentation on July 28, involving Google engineers alongside Agnisys's, which suggests that at least one major tech company is using or evaluating this automation in its own chips.

The underlying fact that makes this note interesting, beyond being a promotional release from a niche company, is where agentic AI is entering: not into text generation, application code or images, but into the very process of designing the silicon that makes the rest of the AI revolution possible. Agnisys explicitly markets its tools for AI chips, automotive platforms and multi-core systems, precisely at a time when demand for AI accelerators (GPUs, TPUs and custom chips) is the most cited physical bottleneck in the industry.

In general, semiconductor design is a domain where deterministic automation has been the norm for decades: so-called EDA (Electronic Design Automation) tools are mature, with very rigid standards because an error in a chip cannot be patched afterward with a software update. What is changing now is that companies like Agnisys are beginning to wrap that classic automation in layers of agentic AI —systems that understand a design intent expressed in specification language and autonomously execute several stages of the flow— without giving up, they say, the "correct by construction" character that the industry demands. It is the same agentic logic we already see in software programming or office operations, transplanted to a sector where the margin for error is far smaller.

Our reading is that this kind of announcement, though modest in media reach, is a useful early indicator: when agentic AI begins to become normalized in verticals as conservative and regulated as chip design —where the reliability bar is extremely high— it is a sign that the technology has matured enough to operate with reduced supervision on high-value technical tasks, not just on administrative or creative ones. In the short term, this probably reduces the need for verification engineers dedicated to repetitive checking tasks, while increasing the value of those who define the architecture and oversee design judgment; the pattern is the same we have already seen in other sectors: the routine is automated, expert judgment is revalued. In the long term, every improvement in the speed and reliability of chip design —including that of AI accelerators— directly feeds the virtuous circle toward the computational abundance that underpins our core thesis: more and better chips, cheaper and faster to design, is one of the quiet but indispensable pieces on the path toward an AI capable of tackling problems such as disease or resource scarcity. It is worth, however, carefully separating a specific company's commercial announcement —with its own, unaudited figures— from that broader structural trend, which is what really matters.

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